PHYs and RJ-45 SFPs
On a Trident 3 switch every front-panel port is driven by a SerDes inside the
switch chip: Falcon cores (TSC-F16) for the QSFP28 ports and their
breakouts, and a Merlin core (TSC-E16) for the SFP+ ports. That SerDes is
the port’s PHY as far as the shell is concerned. Boards with external PHY
chips exist, but the switches covered here have none. An RJ-45 SFP module
brings its own copper PHY inside the module.
This page shows how to find out what PHY a port has, how to read its settings, and how to set up an SFP cage for a 1000BASE-T (RJ-45) SFP. For link problems see Debugging a link.
Which PHY does a port have?
phy info lists the PHY driver of every port, and
portmod info port shows one port in more detail, including whether
an external PHY is attached:
Hardware-validated
drivshell> portmod info port=12
Port: 012
Parent PM: 003
Phys: 012
Mac: CLMAC
Polarity: TX:1, RX:1
Internal PHY Address: 137
External PHY Address: Not Attached
Core Mode: Quad
Phys is the physical lane, Core Mode: Quad means the core runs four
independent lanes (a 4x10G breakout here), and Polarity is the lane’s TX and RX
polarity setting from the board configuration. External PHY Address: Not
Attached means the SerDes is the only PHY.
The classic MII register view of a SerDes port is mostly empty; only the ID
registers 2 and 3 are set (600d/8770, the same on every port):
Hardware-validated
drivshell> phy xe3
Port xe3 (PHY addr 0x89): TSCF-16/02/3 (Tscf)
0x00: 0x0000 0x01: 0x0000 0x02: 0x600d 0x03: 0x8770
0x04: 0x0000 0x05: 0x0000 0x06: 0x0000 0x07: 0x0000
0x08: 0x0000 0x09: 0x0000 0x0a: 0x0000 0x0b: 0x0000
0x0c: 0x0000 0x0d: 0x0000 0x0e: 0x0000 0x0f: 0x0000
0x10: 0x0000 0x11: 0x0000 0x12: 0x0000 0x13: 0x0000
0x14: 0x0000 0x15: 0x0000 0x16: 0x0000 0x17: 0x0000
0x18: 0x0000 0x19: 0x0000 0x1a: 0x0000 0x1b: 0x0000
0x1c: 0x0000 0x1d: 0x0000 0x1e: 0x0000 0x1f: 0x0000
phy int <port> shows the same for the intermediate PHY, which on these
ports is the same SerDes. For the SerDes’ real state use phy diag <port>
dsc (see Debugging a link). portmod phy port=<n> prints a list of
receiver values, but on these switches all of them read 0, even on ports
with link.
PHY settings
phy control
shows the settings of the port’s PHY:
Hardware-validated — An SFP+ port
drivshell> phy control xe4
Current PHY control settings of xe4 ->
Preemphasis = 0xa3200
DriverCurrent = 0xffffffff
DFE ENable = False
LP DFE ENable = False
BR DFE ENable = False
LinkTraining Enable = False
Interface = 0xa
CL74 = False
CL91 = False
CL108 = False
Preemphasis holds the transmit FIR taps (see
Transmit FIR taps), DFE, LP DFE and BR DFE the receive
equalizer modes, LinkTraining the clause 72/92 link training, and
CL74, CL91 and CL108 the FEC (see FEC).
portmod autoneg shows what the port can do, what it
advertises and what the partner advertised:
Hardware-validated — A 10G breakout lane without auto-negotiation
drivshell> portmod autoneg port=12
**********************************************************
****Auto-negociation local port supported ability*********
**********************************************************
Half Duplex Speed: |
Full Duplex Speed: |1000MB|2500MB|5000MB|10GB|
Pause: |PAUSE_TX|PAUSE_RX|PAUSE_ASYMM|
Interface: |GMII|SGMII|XGMII|
Medium: |COPPER|FIBER|BACKPLANE|
Loopback: |LB_MAC|LB_PHY|
Flags: |AUTONEG|
EEE: |
ENCAP: |IEEE|HIGIG|HIGIG2|
**********************************************************
****Auto-negociation local port advertised ability********
**********************************************************
Half Duplex Speed: |
Full Duplex Speed: |1000MB|10GB|
Pause: |PAUSE_TX|PAUSE_RX|
Interface: |
Medium: |BACKPLANE|
Loopback: |
Flags: |
EEE: |
ENCAP: |
**********************************************************
****Auto-negociation received ability from partner********
**********************************************************
Half Duplex Speed: |
Full Duplex Speed: |
Pause: |
Interface: |
Medium: |BACKPLANE|
Loopback: |
Flags: |
EEE: |
ENCAP: |
Media type and MDI crossover are part of the port status:
MDIX(ForcedNormal, Normal) Medium(None).
RJ-45 SFPs
A 1000BASE-T SFP has a copper PHY inside the module. Towards the switch it
uses SGMII, so the cage has to run at 1G with the SGMII interface and
auto-negotiation; the module’s own PHY negotiates with the link partner on
the copper side. On these switches only the SFP+ cages, on the Merlin core, take SFP
modules (port 66, xe4, in the examples).
Set speed and interface first, then turn on auto-negotiation with a
separate command. Given in one command, an=on wins and the port keeps its
old speed and interface. Use the port number: at 1G the port is renamed
from xe to ge.
Hardware-validated — Port 66 set up for a 1000BASE-T SFP
drivshell> port 66 speed=1000 if=SGMII
drivshell> ps 66
ena/ speed/ link auto STP lrn inter max cut loop
port link Lns duplex scan neg? state pause discrd ops face frame thru? back encap
ge0( 66) !ena 1 1G FD SW No Forward Untag F SGMII 9122 No IEEE
drivshell> port 66 an=on
drivshell> ps 66
ena/ speed/ link auto STP lrn inter max cut loop
port link Lns duplex scan neg? state pause discrd ops face frame thru? back encap
ge0( 66) !ena 1 - SW Yes Forward Untag F SGMII 9122 No IEEE
drivshell> port 66
PORT: Status (* indicates PHY link up)
ge0 (Disabled LS(SW Auto(no link) Ability (fd = 10MB,100MB,1000MB,2500MB,10GB hd = intf = gmii,sgmii,xgmii medium = copper,fiber pause = pause_tx,pause_rx,pause_asymm lb = none,MAC,PHY flags = autoneg )Local (fd = 1000MB,2500MB,10GB hd = intf = gmiimedium = pause = pause_tx,pause_rx lb = flags = )Stad(e0:39:d7:88:3b:00) STP(Forward) Disc(untagged) Lrn(FWD) UtPri(0) Pfm(FloodNone) IF(SGMII) PH(Slave) Max_frame(9122) MDIX(ForcedNormal, Normal) Medium(None) VLANFILTER(3)
ps now shows the port as ge0 with SGMII and auto-negotiation on;
the speed column shows - until a link is negotiated. To advertise only
1G full duplex:
Hardware-validated
drivshell> port 66 adv=1000full
drivshell> port 66 adv=1000FD
Invalid port mode string.
Examples: 21g,1000full,100,10,pause 100,pause_tx,pause_rx,cl74|cl91|fec_none,short|long
Failed to execute the diagnostic command. Error: Operation failed.
The port-mode strings are those in the error message: 1000full,
100, 10, pause and so on. port <port> adv prints nothing
useful on these switches; read the advertisement from the full port
<port> status (Local (fd = …)) or from portmod autoneg.
To return the cage to 10G SFP+ operation:
Hardware-validated
drivshell> port 66 an=off
drivshell> port 66 speed=10000 if=XFI
drivshell> port 66
PORT: Status (* indicates PHY link up)
xe4 (Disabled LS(SW Forced((10GFD) Stad(e0:39:d7:88:3b:00) STP(Forward) Disc(untagged) Lrn(FWD) UtPri(0) Pfm(FloodNone) IF(XFI) PH(Slave) Max_frame(9122) MDIX(ForcedNormal, Normal) Medium(None) Fault(Local) VLANFILTER(3)
Changes made here are lost when syncd restarts. To keep them, configure
the port in SONiC instead (speed 1000 and auto-negotiation on the
EthernetN interface); the shell is the place to try settings out and to
check what SONiC programmed.
The module’s copper PHY is normally not managed by the switch SDK: it does
not appear in phy info, and copper diagnostics such as CableDiag
work only on PHYs the SDK drives. Module details (vendor, type) come from
SONiC: show interfaces transceiver eeprom EthernetN.