Glossary

Terms and abbreviations used in this reference and in the shell’s own output. Where a term means something specific on a Trident 3 switch running SONiC, the entry says so.

ACL: Access Control List. SONiC ACL tables and rules are programmed as field groups and field entries of the IFP. See fieldprocessor show and bcmsai acl.
ALPM: Algorithmic Longest Prefix Match: a way of storing large route tables in hash-table banks behind a small TCAM, enabled by the configuration variable l3_alpm_enable. On the SONiC Trident 3 switches tested, ALPM is disabled and routes are held in the DEFIP TCAM, so ALPM and l3 alpm show print ALPM is disabled! or ALPM is unsupported or disabled!.
API commands: Shell commands such as l2, l3, vlan and FieldProcessor that call the SDK API, the same API the SAI uses. Compare chip access commands.
ARL: Address Resolution Logic: Broadcom’s older name for the L2 address table and its lookup. The shell still uses it for the SDK’s software copy of the L2X table (“software ARL table”); see dump and show.
aset: Action set: the list of actions a field group may use. See fieldprocessor aset show. Compare qset.
ASF: Alternate Store and Forward: Broadcom’s name for cut-through switching. See asf and port pbmp asf.
ASIC: Application-Specific Integrated Circuit: the switch chip itself. On the switches this reference covers it is a Trident 3; the shell numbers it as unit 0.
ASIC_DB: The SONiC Redis database that holds the SAI objects orchagent wants programmed. syncd reads it and calls the SAI. Changes made from the shell are not written back to ASIC_DB.
BCM.0>: The prompt of the classic SDK shell, for unit 0, shown in Broadcom documentation. SONiC’s front-end shows drivshell> instead; the commands are the same. See Accessing the shell.
BCM56870: The part number of the Trident 3-X7 switch chip, shown by the shell as BCM56870_A0 (revision A0). See show unit.
bcmcmd: The SONiC host command that runs one diag-shell command inside syncd and prints the result; useful in scripts. See bcmcmd and Accessing the shell.
BCMSAI: The diag-shell command added by the Broadcom SAI for its own debug views (route, ACL, object state, warm-boot data). See BCMSAI.
bcmsh: The SONiC host command that opens an interactive diag-shell session inside syncd. See bcmsh and Accessing the shell.
BDE: Broadcom Device Enumerator: the SDK layer, partly a Linux kernel module, that finds the switch chip on PCIe and maps its registers and DMA memory for the SDK.
BER: Bit Error Rate: the share of received bits that are wrong on a SerDes lane, measured with PRBS or from FEC counters. See phy diag.
BFD: Bidirectional Forwarding Detection. The SDK can run BFD sessions on the chip’s embedded microcontroller; see bfd.
BIST: Built-In Self-Test: hardware test of the chip’s internal memories. See bist. It overwrites the memories it tests, so it is only for a switch out of service.
BPDU: Bridge Protocol Data Unit: a spanning-tree control frame. The switch recognises BPDUs by destination MAC; see bpdu.
BroadSync: Broadcom’s time-of-day and 1PPS interface, run as firmware on an embedded core. SONiC does not load this firmware on Trident 3, so broadsync prints Failed: Broadsync firmware not loaded.
cache: The SDK’s software copy of selected hardware tables. Reads can come from the cache instead of the chip; nocache on dump forces a hardware read. See cache.
CANCUN: Canned Configuration: Broadcom’s set of loadable packages that program the Trident 3’s flexible parser and pipeline: the CIH, CMH, CCH, CEH and CFH files, plus ISPF. syncd loads them at start-up. See cancun stat.
cell: The unit of packet buffer in the MMU. A packet occupies one or more cells, and buffer thresholds (THDI, THDU) count cells rather than bytes.
CFAP: Cell Free Address Pool: the MMU’s list of free buffer cells. See cfapinit, which re-initialises it.
chg: A display option of dump and getreg that prints only entries or fields whose value differs from the reset default; the quickest way to see what is programmed. See dump chg.
chip access commands: Shell commands such as getreg, modreg, dump, listmem and Write that read and write registers and memories directly, below the SDK API. See Memories and registers.
CIH
CMH
CCH
CEH
CFH: The five CANCUN package types, named by their file suffix. CIH holds the chip initialisation writes; CMH and CCH hold mapping and configuration data; CFH describes the flexible flows and their table views (see flowdb); CEH holds named field encodings. cancun stat shows the version of each.
CINT: C Interpreter: the SDK’s built-in interpreter. It runs C-like code that calls the SDK API directly. See cint and Cint: the C interpreter.
CLMAC
XLMAC: CL and XL Media Access Controller: Ethernet MAC blocks. Broadcom reads CL as C (100G) plus L (40G), and XL as 10G multi-port (X), low-latency (L). CLMAC is the 100G-class MAC of a CLPORT Port Macro, XLMAC the 40G-class MAC of an XLPORT. On Trident 3 the front-panel ports use CLMAC; their registers have names such as CLMAC_CTRL. See Memories and registers.
CMIC
CMICx: CPU Management Interface Controller: the block that connects the host CPU to the switch over PCIe and carries register access (S-channel), packet DMA, interrupts and linkscan. Trident 3 has the CMICx version. See intr and getreg pcim.
config.bcm: The file of configuration variables the SDK reads at start-up. On SONiC it is in the platform’s HWSKU directory, for example /usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm on a Seastone2. See Configuration variables.
configuration variable
config property
SOC property: A name=value setting of the SDK, read from config.bcm at start-up, such as portmap_<n> or l3_alpm_enable. All three names are used for the same thing. See config show and Configuration variables.
CoS: Class of Service: the internal priority that selects an egress queue. See cos.
counter thread: The SDK task that periodically reads the hardware MIB counters into 64-bit software counters. All port counters SONiC shows come from it. See counter and show counters.
CPU port: The internal port, cpu0, through which packets go between the switch and the host CPU by DMA. On SONiC, KNET hands these packets to Linux. See KNET and the CPU port.
CTSW: An SDK driver mode for another chip family. mode accepts it, but Trident 3 supports only ESW.
DCB: DMA Control Block: a descriptor telling the packet DMA engine where a packet buffer is and how to send or receive it. See dma.
DEFIP: The SDK’s name for the IPv4/IPv6 longest-prefix-match routing table (memory L3_DEFIP, with L3_DEFIP_PAIR_128 for long IPv6 prefixes), stored in a TCAM. On Trident 3 SONiC switches with ALPM off, it holds up to 16384 IPv4 routes. See l3 defip show and Inspecting L3 forwarding.
DFE: Decision-Feedback Equalization: an adaptive receive equalizer of a SerDes lane. Its taps appear in phy diag and phy control output. In the SDK’s driver names DFE is also a fabric-element chip family that has nothing to do with Trident 3.
diag shell
drivshell: The Broadcom SDK’s command interpreter, documented here. On SONiC it runs inside syncd and shows the prompt drivshell>; Broadcom documentation shows the classic prompt BCM.0>. See Accessing the shell.
DLF: Destination Lookup Failure: a unicast packet whose destination MAC is not in the L2X table, so it is flooded. Storm control limits it with rate.
DMA: Direct Memory Access: the chip copying data to or from host memory without the CPU. The switch uses DMA for packets to and from the CPU port, for table reads and for counter collection. See dma.
DSCP: Differentiated Services Code Point: the 6-bit priority field of the IP header. See dscp.
dsserve: The small proxy in the syncd container that connects syncd’s console to a UNIX socket, so that bcmsh and bcmcmd can reach the shell. It accepts one client at a time. See Accessing the shell.
ECC: Error-Correcting Code: check bits stored with a memory entry that let the chip detect and correct bit errors. See SER.
ECMP: Equal-Cost Multi-Path: a route that spreads traffic over several next hops. In the SDK an ECMP group is a list of egress objects. See l3 ecmp egress show and l3 multipath show.
EEE: Energy-Efficient Ethernet (IEEE 802.3az): low-power idle on a link while no traffic is sent. See phy eee.
EFP: Egress Field Processor: the field processor stage applied as packets leave, matching EFP_TCAM. See FieldProcessor.
egress object: The SDK object for a next hop: outgoing L3 interface, destination MAC and port or trunk. Routes and host entries point to an egress object ID. See l3 egress show.
ESW: Enterprise SWitching: the SDK driver family for StrataXGS chips such as Trident 3. mode shows it; the other modes, LTSW and CTSW, are for other chips.
EthernetN: SONiC’s name for a front-panel interface. The shell does not use these names; port_config.ini maps each to its lanes, and show pmap maps lanes to shell ports. See Ports and port bitmaps.
FEC
RS-FEC: Forward Error Correction on a SerDes link. RS-FEC is Reed-Solomon FEC, used for example on 100G ports. See phy and portmod status.
field entry: One rule of a field group: qualifiers to match, actions, a priority and optional policer and stat. See fieldprocessor show entry.
field group: A set of field processor rules that share a qset and a slice of the TCAM. SONiC ACL tables become field groups. See fieldprocessor show group.
field processor
FP: The chip’s TCAM-based packet classifier, used for ACLs, traps to the CPU and policing. Trident 3 has three stages: VFP, IFP and EFP. See FieldProcessor. Broadcom hardware documentation also calls it the Filter Processor, and names the stages VCAP, ICAP and ECAP (VLAN, Ingress and Egress Content Aware Processor).
FlexFlow: Broadcom’s flexible-pipeline feature set on Trident 3 (VXLAN, NAT, IFA and other tunnels), programmed through the CANCUN flow definitions. See flowdb.
flexport: Changing the port layout of a Port Macro (number of ports, lanes and speed) while the switch runs. See FLEXport.
flow tracker: Hardware flow table with export by an application on the embedded microcontroller, used for flow monitoring. See flowtracker and ipfix.
front-panel port: A port with a physical connector on the switch, named EthernetN in SONiC and xe/ce in the shell. Not every logical port is a front-panel port: cpu0 and loopback ports are not. See Ports and port bitmaps.
gport: Generic port: a 32-bit SDK identifier that encodes the kind of port (local port, module/port, trunk, virtual port, queue …) and its number. See gport.
hash table: A hardware table whose entries are found by hashing the key into a bucket, such as the L2X table or the L3 host table. Hash collisions can make an add fail while the table still has free entries. See hash and l2 conflict.
HiGig
HiGig2: Broadcom’s proprietary header for stacking switch chips: a module header in front of the Ethernet frame that carries the source and destination module id and port. SONiC does not use HiGig on Trident 3. h2higig2 decodes a HiGig2 header.
hit bit: A bit set by hardware when an entry (for example an L2 or L3 host entry) is used. Aging and route-usage tools read and clear it. See l2 show and l3 l3table show.
host table: The L3 table of exact-match host routes (/32 and /128), mostly ARP and neighbour entries, kept in a hash table. See l3 l3table show and l3 ip6host show.
HWSKU: Hardware SKU (stock keeping unit): SONiC’s name for a hardware variant of a platform. Its directory (/usr/share/sonic/hwsku inside syncd) holds config.bcm, sai.profile and port_config.ini.
I2C: Inter-Integrated Circuit: a two-wire serial bus for low-speed board devices such as sensors, clock chips and EEPROMs. The shell’s I2C utilities, such as adc, use the switch chip’s own I2C bus as wired on Broadcom reference boards; on SONiC switches these devices are normally on the CPU’s buses instead.
IFA: In-band Flow Analyzer: Broadcom’s in-band network telemetry, one of the FlexFlow features. See flowdb.
IFP: Ingress Field Processor: the main field processor stage, after lookups in the ingress pipeline; SONiC ACLs live here. Its rules are in IFP_TCAM. See FieldProcessor.
IPFIX: IP Flow Information Export (IETF RFC 7011): the flow-record export format used by the flow tracker. See IPFIX start.
IPMC: IP multicast: the multicast routing table and replication. See ipmc.
iProc: Internal Processor: the embedded ARM subsystem of the switch chip, with its own SRAM and the Cortex-M0 cores. See iprocread.
KNET: Kernel Network: Broadcom’s kernel network driver (linux-bcm-knet). It creates the Linux netdevs (netifs) such as SONiC’s EthernetN and moves packets between them and the CPU port, steered by filters. See knetctrl and KNET and the CPU port.
KNET filter: A KNET rule that decides whether a packet sent to the CPU goes to a netif, to the SDK’s receive code, or is dropped. See knetctrl filter show.
KnetSync: The kernel-side support for PTP timestamping with KNET. It needs firmware that SONiC does not load on Trident 3, so knetsync prints Failed: KnetSync firmware not loaded.
L2 cache: A small TCAM (memory L2_USER_ENTRY) for MAC addresses that need special handling, such as the BPDU addresses. See l2 cache show.
L2X
L2_ENTRY
FDB: The MAC address table (Forwarding Database, FDB), a hash table of 288K entries on Trident 3. L2X is the SDK’s view of it; L2_ENTRY_SINGLE and L2_ENTRY_ONLY_SINGLE are other views of the same table. See l2 show and Memories and registers.
L3 interface: The SDK’s router interface: a VLAN (or port), a router MAC, a VRF and an MTU. Packets addressed to its MAC are routed. See l3 intf show.
LAG
trunk: Link Aggregation Group. The SDK calls it a trunk; SONiC’s PortChannels are trunks underneath. Member choice uses the RTAG7 hash. See trunk show.
lane: One SerDes transmit/receive pair. A 100G port on Trident 3 uses four 25G lanes. port_config.ini and the portmap variables assign lanes to ports. See portmod info pm and Ports and port bitmaps.
learning
aging: Learning adds a source MAC address and port to the L2X table; aging removes entries not seen for the age time. An SDK thread reports both events to the software. See l2mode and age.
LED processor: The program that drives the front-panel port LEDs from link state. On Trident 3 it runs on an M0 core together with the link-scan firmware. See led and M0.
libsai: libsai.so, the Broadcom SAI library loaded by syncd. It contains the SDK and the diag shell.
linkscan: The SDK task that watches each port’s link state and reconfigures the MAC on a change. On SONiC this is how syncd learns that a port went up or down. On Trident 3 the scanning is done by M0 firmware. See linkscan.
LLFC: Link Layer Flow Control: flow-control settings of a port’s MAC, shown next to the PFC settings by portmod fc.
LLS: Link List Scheduler: the Trident 3 egress scheduler, a tree of nodes per port that ends in queues. See lls.
logical port: The SDK’s port number, used in the shell’s port names and bitmaps. It is neither the SONiC EthernetN number nor the physical port number. See show pmap and Ports and port bitmaps.
LTSW: The SDK driver family for newer chips programmed through logical tables (Trident 4, Tomahawk 4 and later, using the SDKLT/HSDK software). Trident 3 is an ESW device, so LTSW commands are not available. See mode.
M0: The ARM Cortex-M0 microcontroller cores in the chip’s iProc subsystem. On SONiC Trident 3 switches core 0 runs the link-scan and LED processor firmware. See M0 status.
MAC: Two meanings: a MAC address, or the Ethernet MAC (media access control) layer of a port, the hardware between the switch pipeline and the SerDes. For the latter on Trident 3, see CLMAC.
MCS: Micro Controller Subsystem: the chip’s embedded microcontroller cores (uC 0 and uC 1) that run firmware for features such as BroadSync, PTP and BFD. SONiC loads no firmware onto them on Trident 3. See MCSStatus.
MDIO
MIIM: Management Data Input/Output and MII Management (MII: Media Independent Interface): the management bus over which the SDK reads and writes PHY registers. See mtimeout.
memory
table: In the SDK, a hardware table addressed by index, such as L2X or ING_L3_NEXT_HOP. List them with listmem, read them with dump. See Memories and registers.
MIB counters: Management Information Base counters: the per-port hardware statistics counters (packets, octets, errors by type), read by the counter thread. See show counters and show mib.
MiM: MAC-in-MAC, IEEE 802.1ah provider backbone bridging. The SDK supports it; SONiC does not use it. See mim.
mirror destination
MTP: Where mirrored packets are sent: a port, possibly with an encapsulation for remote mirroring (RSPAN, ERSPAN). Broadcom documentation calls the mirror target the mirror-to port (MTP). See mirror dest show and Capture port traffic with tcpdump.
MMU: Memory Management Unit: the chip’s packet buffer and its admission, queuing and scheduling logic between the ingress and egress pipelines. See mmudebug, THDI and LLS.
module id
modid: The number of a switch chip in a stacked system; ports are addressed as (module, port). A single-chip SONiC switch uses one module ID. See modmap and stackmode.
MPLS: Multiprotocol Label Switching. The SDK supports MPLS label switching and VPNs; see mpls.
my station
L2 station: A TCAM (memory MY_STATION_TCAM) of router MAC addresses; a packet whose destination MAC matches is sent to L3 routing. See l2 station show.
netif: A KNET network interface: a Linux netdev bound to a switch port or VLAN. SONiC’s EthernetN interfaces are netifs. See knetctrl netif show.
next hop: Where a routed packet goes next: an outgoing interface and a destination MAC. In the SDK it is an egress object, stored in ING_L3_NEXT_HOP and EGR_L3_NEXT_HOP.
OAM: Operations, Administration and Maintenance: Ethernet connectivity fault management (IEEE 802.1ag / Y.1731). See oam.
OCP SAI: The Open Compute Project’s standard Switch Abstraction Interface headers. The Broadcom SAI implements a given OCP SAI version; bsv prints both.
OpenBCM: Broadcom’s public release of the SDK source code, including the diag shell. See Further reading.
orchagent: The SONiC process (in the swss container) that turns configuration and routing state into SAI objects in ASIC_DB. It does not see changes made from the shell.
packet watcher
PW: A shell thread that receives packets sent to the CPU and prints them. See PacketWatcher.
PBMP
port bitmap: A set of ports, written in the shell as a list such as xe0-xe3,ce1 or as a hex bitmap of logical port numbers. See pbmp and Port bitmap grammar.
PCS: Physical Coding Sublayer: the part of a port’s physical layer between the MAC and the PMD that handles line coding (for example 64b/66b), lane alignment and FEC. See portmod status.
PFC: Priority-based Flow Control (IEEE 802.1Qbb): pause frames per priority, sent when a priority group fills. See portmod fc.
PG
priority group: An ingress buffer accounting class of a port. Packet priorities map to PGs, and THDI limits and PFC work per PG. Trident 3 has eight PGs per ingress port.
PHY: Physical layer transceiver: the physical-layer device of a port. On Trident 3 every front-panel port is a lane of an on-chip SerDes; an external PHY exists only if the board has one. See phy.
physical port: The chip’s number for a SerDes lane position, as opposed to the logical port. Written phy<n> in a port bitmap. See show pmap.
pipe
pipeline: One copy of the packet-processing pipeline. Trident 3 has two, pipe0 and pipe1, each serving half of the ports; many tables exist once per pipe (IFP_TCAM_WIDE_PIPE0). See Memories and registers.
PKTIO: Packet I/O: an alternative packet driver for tx and PacketWatcher; switched with pktio.
PMD: Physical Medium Dependent sublayer: the part of a port’s physical layer that drives and receives the signal on the medium; on Trident 3 the transmit and receive circuits of the SerDes. See phy diag.
policer: A meter that marks or drops traffic above a configured rate, attached to a field entry. See fieldprocessor policer create. Port storm control is set with rate instead.
Port Macro
PM: A SerDes core with its MAC (CLMAC), serving four lanes on Trident 3. See portmod info pm and FLEXport.
port type prefix: The letters of a shell port name: xe for 10G/25G, ce for 100G, ge for 1G, cpu and lb for the CPU and loopback ports. On Trident 3 the prefix follows the configured speed, so a port’s name can change. See Ports and port bitmaps.
port_config.ini: SONiC’s per-HWSKU file that names each EthernetN interface and lists its lanes, speed and alias.
PortMod: Port module: the SDK layer that drives the MAC and SerDes of each Port Macro. See PortMod.
PRBS: Pseudo-Random Bit Sequence: a test pattern sent over a SerDes lane to measure bit errors. It replaces traffic on the port. See phy prbs and portmod prbs get.
presel: Preselector: a field processor rule that picks which field groups apply to a packet. See fieldprocessor show presel.
PTP: Precision Time Protocol (IEEE 1588). The chip supports it with embedded firmware, which SONiC does not load on Trident 3; see ptp, BroadSync and KnetSync.
PVTMON: The chip’s on-die Process, Voltage and Temperature monitors. Read them with show tempmonitor or the TOP_PVTMON_RESULT_* registers (getreg chg).
qset: Qualifier set: the packet fields a field group can match. See fieldprocessor qset show. Compare aset.
queue: An egress buffer queue of a port. Trident 3 has unicast and multicast queues per port, selected by CoS and served by the scheduler. See cos and show pmap.
rc script
soc script: A text file of shell commands, usually named *.soc, run with rcload. See Scripting.
RDBGC
TDBGC: Receive Debug Counter and Transmit Debug Counter: programmable counters that count packets matching a set of triggers, mostly drop reasons. See customstat.
register: A named hardware control or status word, possibly one per port or block, such as ING_CONFIG_64 or CLMAC_CTRL. See listreg, getreg and Memories and registers.
RTAG7: Rules Tag 7: Broadcom’s configurable packet hash used to pick an ECMP or LAG member. See SwitchControl and HashDestination.
S-channel
schan
S-bus
SBUS: The chip’s internal command bus over which the CPU reads and writes registers and tables. The bus rings inside the chip are the S-bus; the S-channel is the CMIC interface that sends messages over them. See schan.
SAI: Switch Abstraction Interface: the vendor-neutral API that SONiC uses to program the switch. Broadcom’s SAI (libsai) runs inside syncd and calls the SDK. See OCP SAI and BCMSAI.
sai.profile: A file in the HWSKU directory with settings passed to the SAI at start-up, among them which config.bcm to load.
scache: The SDK’s warm-boot store, where it keeps software state that cannot be read back from the hardware, so that a warm boot can restore it. See warmboot scache.
scheduler: The egress logic that decides which queue of a port sends next, by strict priority or by weighted or deficit round robin. On Trident 3 it is the LLS. See cos and lls.
SDK: Software Development Kit: Broadcom’s switch software. SONiC for Trident 3 ships SDK 6.5, linked into the Broadcom SAI and run inside syncd. The diag shell is part of it.
SDKLT: Logical Table Software Development Kit: Broadcom’s SDK for newer chips programmed through logical tables. Trident 3 uses SDK 6.5 instead; see LTSW.
Seastone2: A Celestica 32-port 100G switch built on Trident 3 (BCM56870), supported by SONiC. Its config.bcm is td3-seastone_2-32x100G-vxlan.config.bcm.
SER: Soft Error Recovery: detection and repair of parity and ECC errors in the chip’s memories. See ser.
SerDes: Serializer/deserializer: the high-speed transceiver for each lane. Trident 3 front-panel ports use Falcon SerDes cores (up to 25G per lane). See TSC and phy.
sFlow
port sampling: Sampled Flow: packet sampling for flow monitoring. The chip samples one packet in N per port and sends it to the CPU, where SONiC’s sFlow agent picks it up. See portsamp.
stat: A counter attached to a field entry that counts packets or bytes matched. See fieldprocessor stat get.
STG: Spanning Tree Group: a set of VLANs sharing one spanning-tree state per port. See stg show.
storm control: Per-port rate limits for broadcast, multicast and DLF traffic. See rate.
STP: Spanning Tree Protocol (IEEE 802.1D): the protocol that blocks redundant L2 paths. The chip keeps its per-port state for each STG. See stg stp.
StrataXGS
XGS: 10 Gig Switching: Broadcom’s family name for its Ethernet switch chips, Trident 3 included. Built-in help sometimes names XGS generations, as in “Only for XGS4 devices” in mpls.
SwitchControl: The SDK’s global and per-port switch settings: CPU copy of protocol packets, hash setup, mirroring options and more. See SwitchControl.
swss: SONiC’s Switch State Service container, which runs orchagent. If syncd restarts, swss restarts with it.
syncd: The SONiC container and process that reads ASIC_DB and programs the switch through the SAI. The SDK, and with it the diag shell, runs inside syncd. See Accessing the shell.
TCAM: Ternary Content-Addressable Memory: a table matched by value and mask, highest priority wins. Used for routes (DEFIP), the field processor and the L2 cache. (tcam is for external TCAMs, which Trident 3 systems do not have.)
THDI: Threshold Ingress: the ingress threshold logic of the MMU, with per-port and per- PG cell accounting and limits that decide whether a packet is admitted to the buffer and when PFC pause is sent.
THDU
THDM
THDO: Threshold egress Unicast and Threshold egress Multicast: egress threshold logic of the MMU. On Trident 3 THDU accounts unicast cells per queue and THDM multicast; THDO is the egress block name of older chips, still seen in some register names.
Tomahawk 3
TH3: A Broadcom switch chip. Some commands present on Trident 3 builds, such as tmshow and l2learn, work only on Tomahawk 3.
TPID: Tag Protocol Identifier: the EtherType of a VLAN tag, 0x8100 by default. See dtag for Q-in-Q (double tagging).
Trident 3
TD3: The Broadcom StrataXGS switch chip family this reference covers; here the BCM56870 (Trident 3-X7), with 128 SerDes lanes of up to 25G, for example 32 × 100G ports.
TSC
Falcon
Merlin: TDM-based SerDes Controller (TDM: time-division multiplexing): Broadcom SerDes cores. The letter after TSC names the core: TSC-F (also written TSC4-F or TSCF) is Falcon, TSC-M Merlin. Trident 3 front-panel ports use Falcon cores, four 25G lanes each; Merlin cores serve lower-speed ports. See phy and PortMod.
UDF: User-Defined Field: packet bytes at a configurable offset that the field processor can match. On Trident 3 UDF definitions come partly from the CANCUN packages. See fieldprocessor qual.
unit: One switch ASIC attached to the SDK, numbered from 0. Trident 3 SONiC switches have one unit, 0. See Units.
VFI: Virtual Forwarding Instance: a bridge domain that is not a plain VLAN, used for VXLAN and other overlays; ports join it as virtual ports.
VFP: VLAN Field Processor: the field processor stage at the start of the ingress pipeline, before VLAN and forwarding lookups. Its rules are in VFP_TCAM. See FieldProcessor.
virtual port
VP: An SDK port that is not a physical port, such as a VXLAN tunnel or an MPLS pseudowire; it belongs to a VFI. Shown as a gport.
VLAN: Virtual Local Area Network: a virtual LAN, identified by a 12-bit VLAN ID. The ports and settings of each VLAN are in VLAN_TAB; untagged packets get the port’s default VLAN (pvlan). See vlan show.
VLAN_TAB: The ingress VLAN table: VLAN membership, STG and flood settings per VLAN ID. EGR_VLAN is its egress counterpart. See vlan show.
VRF: Virtual Routing and Forwarding instance: a separate routing table. Routes and L3 interfaces carry a VRF number. See l3 defip show.
VXLAN: Virtual eXtensible LAN: Ethernet tunnelled over UDP/IP. On Trident 3 it is part of FlexFlow and uses VFIs and virtual ports. See flowdb.
warm boot: Restarting the software (syncd) without resetting the chip, so forwarding continues. The SDK restores its state from the scache. See warmboot.
WRED: Weighted Random Early Detection: drops (or ECN-marks) packets with a probability that grows with queue depth. See cos discard.