`LISTmem`

List the entry format for a given table

LISTmem

Shortest form: list.

List the memories (tables) of the unit, or show one table’s entry format. Read-only: it uses the chip description, not the hardware.

listmem: every memory, one per line, with flag letters, the number of entries per copy and a short description. The list is long (several thousand lines on a Trident 3).
listmem <TABLE>: the table’s address, copies (blocks), flags (sorted, hashed, cachable and whether caching is on, read-only, …), index range and entry size, and each field with its bit range. If <TABLE> is not a memory name, the summary list is filtered to names containing it.
listmem <TABLE> <DW0> …: decode the given entry words into fields.

The index range shown is the running unit’s, which can be smaller than the chip maximum. If the memlist_enable configuration property is 0 the command does nothing. Names and views: Memories and registers.

Hardware-validated

drivshell> listmem L2X
Memory: L2X.ipipe0 aka L2_ENTRY alias L2X address 0xa8000000
Flags: valid cachable(on) hashed multiview
Blocks:  ipipe0/dma/slam (1 copy, 1 dmaable, 1 slamable)
Entries: 32768 with indices 0-32767 (0x0-0x7fff), each 14 bytes 4 words
Entry mask: -1 -1 -1 0x00007fff
Description: Combined HW managed L2 entry table.  Includes L2_ENTRY, L2_HITDA, and L2_HITSA
  VLAN_ID<19:8>
  VLAN:STATIC_BIT<102>
  VLAN:SRC_DISCARD<105>
  VLAN:SCP<106>
  VLAN:RPE<96>
  VLAN:RESERVED_KEY_PADDING<34:32>
  VLAN:RESERVED<53:35>
  VLAN:PRI<100:97>
  VLAN:PENDING<101>
  VLAN:OVID<19:8>
  VLAN:MAC_BLOCK_INDEX<94:90>
  VLAN:KEY<34:3>
  VLAN:IVID<31:20>
  VLAN:HASH_LSB<23:8>
  VLAN:EVPN_AGE_DISABLE<107>
  VLAN:DUMMY_INDEX<95>
  VLAN:DST_DISCARD<103>
  VLAN:DESTINATION_1<71:54>
  VLAN:DESTINATION<89:72>
  VLAN:DATA<107:54>
  VLAN:CPU<104>
  VLAN:CLASS_ID<95:90>
  VLAN:ASSOCIATED_DATA<107:54>
  VIF:STATIC_BIT<102>
...

Hardware-validated — All memories whose name contains NEXT_HOP

drivshell> listmem NEXT_HOP
 Flags  C Name                         Entry/Copy Description
 -----C * EGR_L3_NEXT_HOP              65536      Next Hop Table
 -----C * EGR_L3_NEXT_HOP_1              512      Inidividual protection sta...
 -----C   EGR_L3_NEXT_HOP_ACTION_MASK_PROFILE    32      EGR_L3_NEXT_HOP Action Mas...
 -----C   EGR_L3_NEXT_HOP_ACTION_PROFILE    32      Contains bitmap of the act...
 -----C * ING_L3_NEXT_HOP              65536      Reduced version of L3_NEXT...
 -----C * INITIAL_ING_L3_NEXT_HOP      65536      Reduced version of L3_NEXT...
Flags: (r)eadonly, (d)ebug, (s)orted, (h)ashed
       C(A)M, (c)bp, (b)ist-able, (C)achable
    C: Cache state, * means cache is on

Built-in help

Parameters: [<TABLE> [<DATA> ...]]
    If no parameters are given, displays a reference list of all
    memories and their attributes.
    If TABLE is given, displays the entry fields for that table.
    If DATA is given, decodes the data into entry fields.