`PCIE`

R/W PCIE core registers

Despite its name, this does not access the switch’s PCIe interface. It reads and writes a PCIe-related EEPROM that Broadcom reference boards have on the switch chip’s I2C bus (device pcie0). On a SONiC switch the device is normally missing and the command prints PCIE: cannot open I2C device pcie0: ….

Grammar: pcie r4 <offset> <count> reads <count> 4-byte words and prints <offset> 0x<bytes> per word and Read <n> bytes total; pcie w4 <offset> <data> writes 4 bytes. All three words are required, although the built-in help shows the last two as optional.

Unvalidated

drivshell> pcie r4 0 4

Built-in help

Usages:
           pcie r4 [off] [nbytes]
               - show specified number of pcie bytes starting at offset.
           pcie w4 [off] [data]
               - write data byte to specified pcie offset.

PCIE

`PCIE`